Semiconductor Engineering

Transformer Model Based Clustering Methodology For Standard Cell Layout Automation (Nvidia)

A new technical paper titled “Novel Transformer Model Based Clustering Method for Standard Cell Design Automation” was published by researchers at Nvidia. “Standard cells are essential components of ...
Electronic Design

Standard-Cell Optimization Flow Pumps Yield, Tightens Area

Manual and automated IC-layout tools are integrated in the PEYE Yield Finder analysis software. The combined yield-driven, standard-cell, design optimization flow facilitates the application of design ...
Semiconductor Engineering

Enhancing Power Reliability Through Design-Stage Layout Optimization

As integrated circuit (IC) designs continue to scale, the demand for efficient power management, performance optimization and reliable physical layout modification grows more critical. Meeting these ...
EDN

Timing Closure Using Layout Based Design Process

Chung-Kuan Cheng received a Ph.D. degree inelectrical engineering and computer sciences from University ofCalifornia, Berkeley in 1984. From 1984 to 1986 he was a senior CADengineer at Advanced Micro ...